1. Field of the Invention
One embodiment of the disclosed invention relates to a semiconductor integrated circuit including an oxide semiconductor layer.
2. Description of the Related Art
Signal processing units such as central processing units (CPUs) vary in structure depending on the intended use. The signal processing unit generally has a main memory for storing data or program and other memory circuits such as a register and a cache memory. The register has a function of temporarily holding a data signal to carry out arithmetic processing, holding a program execution state, or the like. The cache memory, which is located between the arithmetic unit and the main memory, is provided to reduce access to the low-speed main memory and speed up the arithmetic processing.
A latch circuit is used as a circuit included in the register (see Patent Document 1). As an example of a specific configuration of a latch circuit, a latch circuit including two clocked inverters and one inverter can be given, for example.
A latch circuit including a ferroelectric capacitor is known (see Patent Document 1).